Skip to main content
Open Virtual Platforms - the source of Fast Processor Models & Platforms Open Virtual Platforms - the source of Fast Processor Models & Platforms

Main menu

  • RISC-V
  • Documentation
  • Demos & Videos
  • Downloads
  • Forums & Login
  • Partners
  • Contact

Quick Links

  • Home
  • About
  • Technology
  • News
  • Models
    • Silicon IP Vendors
    • Processor Family Groups
    • Processor Model Variants
    • Processor Model Documentation
    • Processor Model Downloads
    • Platform Models
    • Peripheral Models
    • Getting FLEXlm License Keys
  • Library
  • Resources
  • Home
    • Welcome
  • About
    • About OVP
    • Why OVP?
    • Virtual Platforms?
    • Rationale?
    • Continuous Integration
    • Partners
    • Licensing
    • Downloading
    • Frequently Asked Questions
  • Technology
    • OVP Technology
    • OVPsim Simulator
    • Free riscvOVPsim simulator
    • Instruction Set Simulator (ISS)
    • OVP APIs
    • OVP Models
    • OVP Documentation
    • OVP & SystemC
    • SystemC TLM2
    • Accellera IP-XACT
    • iGen Model Building Wizard
    • eGui and iGui GUIs for Debuggers
  • News
    • OVP Latest News
    • In the News
    • Press Releases
    • Views and Blogs
    • Industry Events
  • Models
    • Silicon IP Vendors
    • Processor Family Groups
    • Processor Model Variants
    • Processor Model Documentation
    • Processor Model Downloads
    • Platform Models
    • Peripheral Models
    • Getting FLEXlm License Keys
  • Library
  • Resources
    • OVP Partners
    • DAC 2009 Virtual Platform Workshop
    • GDB Related Resources
    • Windows Development and MSYS/MinGW
    • Windows Resources - Detours
    • Windows Resources - API trace

Processor IP Vendors

IP Vendor: Altera Nios II
IP Vendor: Andes
IP Vendor: ARM
IP Vendor: Codasip
IP Vendor: lowRISC
IP Vendor: Microsemi
IP Vendor: MIPS
IP Vendor: openCores
IP Vendor: OpenHwGroup
IP Vendor: POWER
IP Vendor: Renesas
IP Vendor: RISC-V
IP Vendor: SiFive
IP Vendor: Synopsys ARC
IP Vendor: Xilinx MicroBlaze

Search form

In the News

-- Imperas Models - reference for the newly ratified RISC-V Specifications
-- Imperas updates Free reference model riscvOVPsimPlus with new RISC-V P SIMD/DSP extension and Architectural Validation Test Suites
---- More (81) ----

Press Releases

-- Imperas Models - reference for the newly ratified RISC-V Specifications
-- Imperas Models for Arm Processors now available in TESSY by Razorcat
---- More (124) ----

Views and Blogs

-- What Is RISC-V. An In-Depth introduction to the RISC-V Instruction Set Architecture
-- When Is Verification Done?
---- More (68) ----

Industry Events

-- Imperas at the RISC-V Forum on Security, April 14 2021
-- An Insiders View Of Verifying Custom RISC-V Processor Cores
---- More (97) ----

Get Started

  • Documentation Home
  • Processor Model Documentation
  • Download Guide
  • Presentations

Operating System Support

  • Linux
  • FreeRTOS
  • Micrium
  • Other Operating Systems

Processor Models

  • ARM Processor Models
  • MIPS Processor Models
  • RISC-V Processor Models
  • Other Processor Models
(c) 2008-2022 Imperas Software