Open Virtual Platforms (OVP) Initiative for Multi-Core Software Development Releases High Performance Models of ARM Processors

OVP Becomes Founding Member of Synopsys System-Level Catalyst Program

THAME, United Kingdom, October 8, 2009-- The Open Virtual Platforms (OVP) initiative (, founded by Imperas and now boasting more than 1,500 individuals from the embedded systems community registered on the website, has released new models of ARM processor cores. These models work with the OVP simulator, OVPsim, and have exceptionally fast performance of hundreds of millions of instructions per second (MIPS). Additionally, OVP became a founding member of the Synopsys System-Level Catalyst Program. OVP technology provides solutions to the problems embedded software developers incur when modeling the multi-processor system on chip (MPSoC) that hosts their software.

The ARM models released are for the v4 and v5 instruction sets from ARM, supporting 13 processor cores across the ARM7, ARM9 and ARM10 families of processor cores. This includes the ARM926E processor core, the most popular core developed by ARM. These models are instruction accurate, typically enabling simulation speeds of hundreds of MIPS, thus meeting the requirements of application and firmware engineers for their development environments. In addition to working in OVP virtual platforms, the models include SystemC/TLM-2.0 interfaces, enabling native operation in SystemC environments.

"In the automotive electronics industry we always need to do more testing of our embedded systems software. Finding that the simulation performance of the Imperas/OVP ARM model was over 50 times faster than our previous solution opens up new possibilities for us in software testing, and enables us to increase our test coverage and product reliability," said Urban Forssell, CEO of Nira Dynamics AB, a subsidiary of Audi Electronics Venture GmbH.

As the complexity of software running on MPSoCs increases, the need for a cost effective virtualized software development environment has become critical. �Open Virtual Platforms provides needed modeling and simulation tools for next generation embedded systems software development,� stated Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. �The models of the ARM processor cores give OVP users needed models. Also, working with Synopsys as a founding member of the System-Level Catalyst Program ensures interoperability with the popular Synopsys system-level tools, the DesignWare� System-Level Library of models, and virtual platforms using the Innovator development environment.�

�The goals of the Synopsys System-Level Catalyst Program are to increase model availability and tool interoperability with both the Synopsys Innovator virtual platform development environment and the DesignWare� System-Level Library of TLM-2.0 models, enabling developers to do more work at the system level,� said Frank Schirrmeister, product marketing director for the Solutions Group at Synopsys. �Open Virtual Platforms� models support of TLM-2.0 further confirms the quality of OSCI�s transaction-level APIs and provides users with more model options, strengthening the overall system-level ecosystem.�

Gert-Jan Tromp, senior consultant at Dizain-Sync B.V., said that �We were excited to have achieved over 500 MIPS performance for an ARM 7 virtual platform benchmark using OVPsim. We were similarly excited at how easy it was to use OVP processor models in a TLM-2.0 virtual platform.�

In addition to making the models for ARM processors available as free and open source, OVP offers free, open source example virtual platforms for OVP users to download from the OVP website. These example platforms include bare metal applications, the Atmel AT91SAM7 product with the ARM7TDMI core running the uClinux operating system, and the ARM IntegratorCP platform with the ARM926EJ-S core, which boots the Linux operating system in less than 10 seconds. �Key tasks for embedded software developers include porting operating systems and drivers to new platforms, and developing new applications to run on the SoCs,� commented Davidmann. �Fast simulation and easy development of platforms is necessary for these complex systems.�

Open Virtual Platforms (
OVP includes the OVPsim simulator, libraries of models and APIs for developing new models. OVPsim executes platforms, including multicore platforms, at hundreds of millions of instructions per second, providing the speed that software developers require for simulation of embedded systems. Model libraries include everything from individual processor models (from ARC, ARM, MIPS and OpenCores) and component models to more complex platforms, such as ARM IntegratorCP and MIPS Malta development boards for running Linux. OVP APIs enable the community to develop models of processors, behavioral components and peripherals, and to connect these together into virtual platforms that run the final target system software binaries unchanged.

About the OVP Initiative (
The OVP initiative was founded with a donation by Imperas of approximately $4 million of simulation infrastructure. The goal of organization is to help the industry to build an effective multi-core development infrastructure through the use and adoption of open virtual platform technology. The website serves as a portal for OVP members covering details about the technology, providing a discussion forum for the community, and links to download each component. The technology has the support of electronic design automation (EDA) companies, end users and intellectual property (IP) providers. Detailed quotations regarding OVP are available from

About Imperas (
Imperas provides methodologies, technologies and products to enable the efficient and effective verification of software functionality and software performance for embedded systems. Its products enable software functional verification, performance profiling, and analysis for embedded software operating on multiprocessor MPSoCs. With an engineering base in the United Kingdom, Imperas distributes its products to customers worldwide. For more information, visit

Imperas acknowledge trademarks or registered trademarks of other organizations for their respective products and services. Synopsys and DesignWare are registered trademarks of Synopsys, Inc.

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