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On the time slice induced accuracy

 
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KarstenStahl



Joined: 03 May 2021
Posts: 3

PostPosted: Sat Jan 29, 2022 4:58 pm    Post subject: On the time slice induced accuracy Reply with quote

Hello,

In [1] it is described that “the timeslice must be set significantly shorter than the shortest delay that is requested by any model.” I know that scheduled events are always executed on timeslice boundaries and the duration for the next timeslice is always adapted to the shortest planned events [1]. Therefore, I am confused about the part “significantly shorter”. In my understanding no timing inaccuracies should occur as long the time slice is <= “the shortest delay that is requested by any model”. At any time if an event is scheduled in a time slice it is then ensured that the event gets scheduled in the next time slice which can be adapted.

I created a platform where the CPU polls results from a custom peripheral. The peripheral sets the internal result flag to ready after a scheduled event (820ns) after a memory access which starts a calculation. Noticeable accuracy errors were only seen after a time slice bigger than 820ns was selected. However, even before that, small inaccuracies occurred. For instance, I configured a MIPS value of 8.383 which corresponds to an instruction length of 119.28ns per instruction. The quantum size was configured to be 0.00000001s (command line) and no further delays were used in the simulation. However, around 1% of instruction required 238ns instead of the configured 119ns. The timings per instruction were measured with the
Code:
opBusFetchMonitorAdd
callback and the
Code:
opPorcessorTime
was used. The longer instructions did not belong to particular instruction classes.

Thus, my two questions are:

(1) Why does it say “significantly shorter” in [1] for the time slice selection while “smaller” would be sufficient in my understanding.
(2) Why do some instructions do not require the configured MIPS time but longer. In particular, does this depend on the configured time slice if assumption (1) is false.

Many regards and many thanks in advance
Felix Böseler

[1] OVP Peripheral Modeling Guide
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DuncGrah
OVP Technologist
OVP Technologist


Joined: 27 Feb 2008
Posts: 1656
Location: United Kingdom

PostPosted: Thu Feb 03, 2022 5:39 am    Post subject: Reply with quote

for (1) I think you are correct. The time slice must be smaller than the minimum delay required. I think this requires a minor documentation change.

for (2) I cannot think of an obvious reason that this may happen. Is it consistent i.e. always the same instructions that take longer when doing multiple runs?
I wonder if you can provide your test csase to us to run here and look at. If you can please PM me to let me know how to obtain it.

Thanks
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